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You can't be too rich or thin, the saying goes. And at least the thin part applies to chip design. Researchers at the California Institute of Technology hope to usher in a new era of chip design and manufacturing with advancements in nanowire circuitry.
James Heath, a chemistry professor at Caltech, says he's created working silicon devices in which individual transistors are as small as 10 nanometers wide. Mainstream semiconductor manufacturing geometries are between 90 and 65 nanometers wide, and Intel this year showed a 45-nanometer-based device.
Good things in nano packages
The move to mass manufacturing of transistors that tiny is still 10 to 15 years down the road, and it's unclear how manufacturing technologies will work at such levels of miniaturization, Heath says. "We're pushing hard on the future," he says. "The semiconductor industry really doesn't know how it will manufacture circuits in five years."
Using current CMOS (complementary metal oxide semiconductor) manufacturing technology, Heath has built a prototype 200-Kbit memory circuit with individual line dimensions of around 10 nanometers. The total size of the chip is about the size of a blood cell, he says.
Caltech researchers, who are funded in part by the Defense Advanced Research Projects Agency and Hewlett-Packard, now can create highly dense patterns of nanowires and are working to make the technology commercially manufacturable. Within five years, they hope to be able to have sensors that could analyze single strands of DNA. Hundreds of those DNA sensors could be packed into a small chip that could be used to determine pathogens in blood samples.
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